Temporary bonding of a device wafer to a carrier wafer is an act significant to wafer-level processing techniques used in semiconductor manufacturing. The front side, which may also be characterized as the active surface, of a device wafer is bonded to a carrier wafer to support the device wafer and expose the backside of the device wafer for thinning and exposure of conductive vias (commonly termed through-silicon vias (TSVs)) formed through a partial thickness of the device wafer, as well as passivation of the backside of the thinned device wafer and formation of conductive contact pads and, optionally, a redistribution layer (RDL) thereon. After backside processing is complete, the device wafer may be removed from the carrier wafer, diced, and packaged.
Conventionally, a single thermoplastic adhesive is used for temporarily bonding the device wafer to the carrier wafer. FIGS. 1A through 1E illustrate a conventional temporary bonding process flow. FIG. 1A shows a device wafer 100 and a carrier wafer 102 with a layer of thermoplastic adhesive 104 disposed (e.g., spin coated) on a surface thereof. The thickness of the layer of adhesive 104 may be chosen based on, for example, the topography of an active surface 105 of the device wafer 100. Conventionally, the adhesive 104 is disposed to a thickness of between about 5 microns and 150 microns. As an example of a conventional device wafer configuration, the device wafer 100 may be substantially disc-shaped, and may be about 300 mm in diameter and have an initial thickness of about 750 microns. The device wafer 100 includes a plurality of in-process semiconductor devices, such as semiconductor memory, logic or processor dice, on the active surface 105 of the device wafer 100 facing the carrier wafer 102. The carrier wafer 102 is of a similar shape and size to the device wafer 100. One conventional thermoplastic adhesive material that has been used for adhesive 104 is WAFERBOND® HT-10.10, commercially available from Brewer Science, Inc., Rolla, Mo. After application of adhesive 104, carrier wafer 102 with the layer of adhesive 104 is baked to remove solvents from the adhesive 104, e.g., solvents within the as-applied adhesive that facilitate application of the adhesive.
Referring now to FIG. 1B, the device wafer 100 and the adhesive-coated carrier wafer 102 are bonded together by applying heat and pressure. For example, the device wafer 100 and the adhesive-coated carrier wafer 102 may be mechanically pressed together under elevated temperature conditions sufficient to soften the adhesive layer 104 and promote adhesion between the device wafer 100 and the carrier wafer 102. The temperature conditions during bonding may be chosen to approach or exceed a glass transition temperature (Tg) of the thermoplastic adhesive material of the adhesive layer 104. A portion of the softened adhesive 104 may squeeze out around a periphery of an interface 106 between the device wafer 100 and the carrier wafer 102 during bonding. Excess adhesive around the periphery of the interface 106 is removed, e.g., by dissolving the excess adhesive with a solvent.
A backside 108 of the device wafer 100 is thinned by a process such as abrasive grinding and/or chemical-mechanical polishing with or without dry etching. The thinning process may reduce the thickness of the device wafer 100 from an initial thickness of, for example, approximately 750 microns to a thickness of, for example, about 50 microns or less. As noted above, the thinning process may expose ends of conductive vias in the device wafer 100 on the backside 108 of the thinned device wafer 100. Passivation and formation of contact pads 110 (shown in FIG. 1C), with or without a redistribution layer (RDL) may follow thinning.
Referring now to FIG. 1D, after thinning and backside processing, the device wafer 100 may be removed from the carrier wafer 102 by heating the polymer adhesive 104 (FIG. 1A) and applying a shear force in direction 112 (i.e., a force generally parallel to the plane of the interface 106 (FIG. 1B) between the device wafer 100 and the carrier wafer 102). Heat-induced softening of the adhesive 104 enables the device wafer 100 to be slid off of the carrier wafer 102. A solvent may be used to clean (i.e., remove) residual adhesive from the device wafer 100, and the device wafer 100 may then be mounted on a film frame support system 114.
As shown in FIG. 1E, the device wafer 100, after being mounted on the film frame support system 114, may be separated, or “singulated,” into individual dice 116. The individual dice may then be subsequently packaged or assembled with other dice and packaged to form a semiconductor device or integrated device.
Thermal cycles occurring during processing that take place while the device wafer 100 is bonded to the carrier wafer 102 may cause the adhesive 104 to soften, compromising the adhesion between the device wafer 100 and the carrier wafer 102. Furthermore, differing rates of thermal expansion between the wafer material and metallic features, such as TSVs, of the device wafer 100, and differing rates of thermal expansion between the wafer material and the adhesives may lead to warping of the bonded stack (i.e., the device wafer 100 and the carrier wafer 102 bonded by the adhesive 104) during thermal cycles. During processing, portions of the device wafer 100 may become non-parallel to the carrier wafer 102. For example, peripheral edges of the device wafer 100 may lift away (e.g., lose adhesion) from the carrier wafer 102. Areas of the device wafer 100 that lift away from the carrier wafer 102 may be thinned too much or non-uniformly during the thinning process, impacting the ability to use dice subsequently singulated from the device wafer 100 for three-dimensional integration in the form of stacked die assemblies. Lifting of edges of the device wafer 100 may also cause the device wafer 100 to crack or chip and may lead to loss of dice or of an entire device wafer 100, significantly reducing yield.
Moreover, adhesive material 104 that flows from the interface 106 between the device wafer 100 and the carrier wafer 102 may contaminate equipment used for backside processing, leading to costly downtime while the equipment is cleaned.
One other approach to temporary bonding of device wafers and carrier wafers is disclosed in United States Patent App. Pub. No. 2011/0308739 to McCutcheon et al. McCutcheon et al. disclose the use of two different materials in a temporary wafer bonding process.